Monday 22 September 2014

[S562.Ebook] PDF Download Principles of VLSI RTL Design: A Practical Guide, by Sanjay Churiwala, Sapan Garg

PDF Download Principles of VLSI RTL Design: A Practical Guide, by Sanjay Churiwala, Sapan Garg

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Principles of VLSI RTL Design: A Practical Guide, by Sanjay Churiwala, Sapan Garg

Principles of VLSI RTL Design: A Practical Guide, by Sanjay Churiwala, Sapan Garg



Principles of VLSI RTL Design: A Practical Guide, by Sanjay Churiwala, Sapan Garg

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Principles of VLSI RTL Design: A Practical Guide, by Sanjay Churiwala, Sapan Garg

Since register transfer level (RTL) design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains the impact of design decisions taken that may give rise later in the product lifecycle to issues related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc., all which are a function of the way the RTL was originally written.� �Readers will benefit from a highly practical approach to the fundamentals of these topics, and will be given clear guidance regarding necessary safeguards to observe during RTL design.

  • Published on: 2014-10-01
  • Released on: 2014-10-01
  • Original language: English
  • Number of items: 1
  • Dimensions: 9.25" h x .46" w x 6.10" l, .63 pounds
  • Binding: Paperback
  • 182 pages

From the Back Cover




In the process of integrated circuit design, front-end activities start with a register transfer level (RTL) description, of the functionality desired from the IC.� During subsequent steps in the design flow, issues may arise related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc. which are a function of the way the RTL was originally written.

As a result, RTL designers need to take care of many aspects which can have impact on later steps in the design process. Since RTL design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains those various aspects, their significance, what caution needs to be taken during RTL design and why.� Readers will benefit from a highly practical approach to the fundamentals of uncertainties around functionality, clock domain crossing and clock synchronization, design for test and testability, power consumption, static timing analysis, timing exception handling, and routing congestion.

Hopefully, this book will find its place in the hearts and minds of anyone who
generates RTL code. This includes RTL designers as well as those writing tools
that generate RTL. Relatively new RTL designers will find this book to be a single-source of interesting, rich and useful knowledge.� Experienced RTL designers will be able to appreciate and cement some already known concepts, given the focus on practical situations encountered in real designs.


* Provides a highly accessible, single-source reference to all key topics essential to an RTL designer;
* Describes in detail specific actions/cautions that designer needs to consider in design to avoid problems in downstream implementation;
* Covers content based on practical experience with numerous real designs from large semiconductor design companies.









Most helpful customer reviews

3 of 3 people found the following review helpful.
Covers most interview topics in RTL Design
By enginerd
The book is a breadth-first treatment of all things related to Digital Design for ASICs. Having gone through the book, I feel the book should have been named "Principles of Digital Design" or something along those lines as it only tackles RTL for a whole 2 chapters. However, the content in the rest of the book is relevant to all Front-End Design tasks and I feel that it would be worth while for every aspiring ASIC design engineer to get themselves a copy to prepare for interviews and for tasks they will encounter at the work place.

2 of 2 people found the following review helpful.
nice book to get idea about design aspects at RTL
By arindam
I liked the book and it is very well organized in terms of the different domains of RTL design aspects like clock domain crossing analysis, timing constraints, DFT and Power.
It really helped me in getting my technical interview through as it gives really good basic insight about each of these areas and can be a good reference book for RTL analysis and related issues/handling.

1 of 2 people found the following review helpful.
Total waste of time......
By Jack Port
it is kind of waste of money....it goes over the ASIC flow and things which are detected through simulations or verification are explained....it is a very lame attempt to teach something..... I think springer has been printing a lot of books from many "industry" authors just to make money..... it is supposed to be a book on VLSI RTL although it is more of ASIC verification book..... it is not worth the money ....

See all 3 customer reviews...

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